基于FPGA和锁相环4046实现波形发生器

文档编号:JD166    字数:16320,页数:43

摘  要

本设计采用FPGA和锁相环4046实现波形发生器。系统由波形产生模块和可调频率的时钟产生模块，数模转换模块和显示模块四部分组成。波形产生模块完成三种波形的产生，并根据控制信号完成选定波形的输出。可调频率的时钟产生模块能够产生具有不同频率的方波clk，用此方波作为时钟完成输出波形频率的调整。显示模块用于显示输出波形的频率。数模转换模块将波形产生模块输出的数字信号转换为模拟信号；并完成滤波以及放大等功能。此设计的特点在于结合了直接数字频率合成技术和锁相技术各自的优点，同时利用了FPGA的强大处理能力使系统易于实现，结构简单。本设计能产生正弦波，三角波，占空比可调的方波以及它们的线性组合；频率在100Hz~20KHz之间能以100Hz为步进进行调整；幅度可调范围为0~5V。

关键词：正弦波；三角波；占空比可调的方波；频率可调；FPGA；锁相环4046

Abstract

The system is designed to construct an Arbitrary Waveform Generator based on DDFS,with a PLL4046 and FPGA as the key,complimented by necessary analog circuit,so the system is very simple and convenience to realize.In the design ,there are four main module.The first module is oscillator,the modules are responsible for the formation of oscillogram and prefer waveform to output,in other words it can form square waveform,sinusoid waveform and delta waveform and output one kind waveform or the linear combination of several kind waveform;so this module is the key of the system.we use FPGA to realize this module,because FPGA have enough speed and logic unit to use ,and because of its programmable attribute,we can write procedure to complete our design,it is very convenience and reliable.The second module is the control of frequency.in this module,PLL(Phase Lock Loop)4046 plays a key role,iwhich realioze the change of frequency.In fact this module is also the key of the system,if there is not this module ,the frequency of the system can’t be changed and the frequency of waveform can’t be changed,too.PLL4046 have many function,for example:multiply frequency ,modulation.now we use it to multiply frequency,so the range of system frequency  is very wide and having high definition.The third module is the digital-to-analog module.Obviously,it change the digital signal which is from the output port of FPGA into analogy signal by DAC0832,at the same time amplifer is used to amplify analogy signal and  control of its amplitude range. The last module is demonstration module,its duty is to display the frequency of waveform.Then,by cascading every module,this system is realized. At last,this system can form square waveform,sinusoid waveform and delta waveform and linear combination of them.The frequency can be adjusted from 100Hz to 15KHz,its interval is 100Hz.It can gratify the request of the design.

Keywords:：sinusoid waveform；delta  waveform ；square  waveform；FPGA；PLL4046

目    录

摘  要........................................................................... 1
Abstract ........................................................................ 2
引言 ............................................................................ 4
1 设计任务 ...................................................................... 5
1.1 基本要求....................................................................  5
1.2 发挥部分 .................................................................... 5
2 方案论证与比较 ................................................................ 5
2.1 常见信号源制作方法原理 .......................................................5
2.2 常见信号产生电路..............................................................7
3  系统电路的设计 ................................................................7
3.1 系统框图及说明................................................................7
3.2 主要电路设计说明.............................................................10
3.2.1晶体振荡电路................................................................10
3.2.2 倍频电路 ..................................................................11
3.2.3 数模转换和放大滤波电路.....................................................11
3.2.4数码管显示电路 .............................................................12
3.2.5 输入去抖电路...............................................................13
3.3 主要软件设计说明.............................................................14
3.3.1 前端核心软件设计...........................................................14
3.3.2波形产生模块软件设计 .......................................................15
3.4 主要元器件介绍 ..............................................................18
3.4.1 FPGA介绍...................................................................18
3.4.3 VHDL介绍 ..................................................................22
 3.4.4 MAX+PLUSII介绍............................................................23
4  软件仿真与硬件调试和测试......................................................23
4.1 软件部分仿真.................................................................23
4.2 硬件调试 ....................................................................25
4.3 硬件电路测试v ...............................................................25
4.4 误差分析 ....................................................................26
5  工程设计 .................................................................... 26
6  制作 ........................................................................ 27
7 结论 .................................................................... .....28
谢    辞 ....................................................................... 29
参考文献 ....................................................................... 30
附  录 ......................................................................... 31

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