基于AD8341 芯片简介及应用电路设计

字数:8280,页数:26

摘要
AD8341矢量控制器可对射频信号的发幅值和相位进行控制，由于射频信号的射程是直线性的，所以初始调节的特性得以保护。以后将重要介绍射频控制器、可变衰减器/相位转换器，以及二次调制。幅度的控制范围为-4.5dB到-34.5dB，相位的控制范围为0度到360度。对于最大增益，AD8341具有1 dB压缩点输出的值为8.5 dBm和第三级输出截止值为17.5 dBm，其工作频率范围为1.5GHz到2.4GHz。
在笛卡尔I /Q格式中，基带输入控制前加在射频输入信号的幅度和相位的调制，最大调制带宽为230 MHz，它可以通过增加外部电容限制控制线上的噪音带宽来降低射频输入和输出阻抗，为了保护后续阶跃不激励过度，DSOP插头可以输出失效。AD8341的供应电压范围为4.75伏到5.25伏之间，同时工作电流为125mA。

关键词:噪音和失真    性能特征    放电警告   操作理论    射频输入和匹配   I/Q衰减器
评估板

Abstrac
The AD8341 vector modulator performs arbitrary amplitude and phase modulation of an RF signal. Since the RF signal path is linear, the original modulation is preserved. This part can be used as a general-purpose RF modulator, a variable attenu- ator/phase shifter, or a remodulator. The amplitude can be controlled from a maximum of  4.5 dB to less than  34.5 dB, and the phase can be shifted continuously over the entire 360° range. For maximum gain, the AD8341 delivers an OP1dB of8.5 dBm, an OIP3 of 17.5 dBm, and an output noise floor of 150.5 dBm/Hz, independent of phase. It operates over a frequency range of 1.5 GHz to 2.4 GHz.
The baseband inputs in Cartesian I and Q format control the amplitude and phase modulation imposed on the RF input signal. Both I and Q inputs are dc-coupled with a ±500 mV differential full-scale range. The maximum modulation band- width is 230 MHz, which can be reduced by adding external capacitors to limit the noise bandwidth on the control lines.Both the RF inputs and outputs can be used differentially or single-ended and must be ac-coupled. The RF input and output impedances are nominally 50   over the operating frequency range. The DSOP pin allows the output stage to be disabled quickly in order to protect subsequent stages from overdrive.The AD8341 operates off supply voltages from 4.75 V to 5.25 V
while consuming approximately 125 mA.

key words:    NOISE AND DISTORTION       PERFORMANCE CHARACTERISTICS   ESD  CAUTION                    THEORY OF OPERATION
RF INPUT AND MATCHING         I-Q ATTENUATORS
EVALUATION BOARD

目录
1  芯片介绍..........................................................................(6)
1.1  最大绝对额定....................................................................(7)
1.2  规范............................................................................(7)
1.3  放电警告........................................................................(9)
1.4  引脚结构和功能描述..............................................................(9)
1.5  典型性能特征....................................................................(10)
2  操作理论..........................................................................(15)
2.1  射频求积分发生器................................................................(16)
2.2  I/Q衰减器和基带放大器...........................................................(16)
2.3  输出放大器......................................................................(17)
2.4  噪音和失真......................................................................(17)
2.5  增益和相位精度..................................................................(17)
2.6  射频频率范围....................................................................(17)
3  应用..............................................................................(18)
3.1  AD8341的使用....................................................................(18)
3.2  射频输入和匹配..................................................................(18)
3.3  RF输出及匹配....................................................................(19)
3.4  I-Q基带控制的驱动...............................................................(20)
3.5  高速DACS接口....................................................................(20)
3.6  CDMA2000应用....................................................................(21)
  3.7  WCDMA的应用...................................................................(23)
4   评估板...........................................................................(24)
    4.1  通道I基带接口...............................................................(25)
  4.2  通道Q基带接口.................................................................(25)
    4.3  输出接口....................................................................(25)
   4.4  无效输出接口.................................................................(25)
5  外形尺寸及调整引导................................................................(26)
6  结论..............................................................................(27)
   7  参考文献.......................................................................(27)

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