简易逻辑分析仪设计

文档编号:ZD500 文档字数:14130,页数:59，有开题报告，任务书，文献综述

摘     要

 本系统完成了八位数字、可设置门限电压的八位数字量采集通道、单片机系统和示波器显示扩展电路的设计。数字信号发生器能够产生八路预置的循环移位逻辑信号序列，输出信号为TTL电平，序列时钟频率为100Hz，并能够重复输出；数字量采集通道具有采集八路逻辑信号的功能，八位输入电路的输入阻抗大于50KΩ，门限电压可在0.25-4V范围内按十六级变化，每通道的存储深度增加到256Bit。单片机系统实现了以下功能：可设置单级、二级和三级触发字；通过LCD点阵式液晶显示时间标志线所对应时刻的八路输入信号的逻辑状态；选择显示触发前、后所保存的逻辑状态字数；移动光标、翻页和显示触发点；通过串口与上位机通讯；示波器显示扩展电路可以在模拟示波器上稳定显示采集到的八路信号波形、显示触发点的位置和可移动的时间标志线，并实现了触发位置可调的功能。系统经过测试，证明其功能强大，硬件设计合理，软件运行良好。
 
 关键词: 单片机  数字信号发生器  示波器  计算机  LCD  通信  
 
  
Simple Logic Analysis Instrument

Abstract
 This system completes design that eight data and can establish eight data of the threshold electric voltage collects the passage, the single chip computer system and the electric circuit for scope to expand. The digital signal generator produce eight roads prepare to place of circularly move logic signal, the output signal is TTL electric voltage, signal’s clock frequency is 100 Hz, and can repeat export; The amount of digital collects passage has function that collect eight road logic signal, the input resistance of eight input circuit over 50kΩ, the threshold electric voltage can change in 0.25-4V , the saving depth of the each passage increases to 256 bits. The single chip computer system realizes below functions: may establish single class, two classes and three classes trigger word; It displays the logic state word number of eight roads input signal that time marking line to proper to the time by point array type LCD; Choice logic state to keep to display before and behind triggering; Move the light marks and turn over the page with show to trigger point; The system communicates with PC computer by series port; Scope displays expand circuit may in imitate  scope stability displays eight roads signal wave of collect, displays the position that trigger point and move time marking line, and realizes to adjustable function in trigger position. The system by test, proof this system function is strong and big, the hardware design is reasonable, software run is good.

Keywords: single chip computer； digital signal generator； scope；PC computer；
LCD；communicate

目 录

前言
简易逻辑分析仪摘要…………………………………………………………………………………1
第一章  方案论证与比较……………………………………………………………………………3
 1.1 数字信号发生器………………………………………………………………………………3
 1.2 简易逻辑分析仪………………………………………………………………………………3
 1.3 理论分析与计算………………………………………………………………………………6
第二章  简易逻辑分析仪硬件设计………………………………………………………………7
 2.1 总体设计思路…………………………………………………………………………………7
 2.2 主要电路设计…………………………………………………………………………………7
 2.2.1 数字信号发生器…………………………………………………………………………7
 2.2.2 八位数据采集系统……………………………………………………………………13
 2.2.3 单片机系统………………………………………………………………………………13
 2.2.4 示波器显示扩展电路……………………………………………………………………17
第三章  简易逻辑分析仪软件设计………………………………………………………………18
 3.1 主程序流程图……………………………………………………………………………18
 3.2 按键读值子程序流程图…………………………………………………………………18
第四章  测试方法及步骤………………………………………………………………………19
 4.1 信号发生器测试…………………………………………………………………………19
 4.1.1 测试方法………………………………………………………………………………19
 4.1.2 测试步骤………………………………………………………………………………19
 4.2 简易逻辑分析仪测试……………………………………………………………………19
 4.2.1 测试方法………………………………………………………………………………19
 4.2.2 测试步骤………………………………………………………………………………20
总结体会…………………………………………………………………………………………22
参考文献 ………………………………………………………………………………………23
致谢……………………………………………………………………………………………23
附录 一…………………………………………………………………………………………24
简易逻辑分析仪整机电路图……………………………………………………………………24
 附录 二………………………………………………………………………………………27
简易逻辑分析仪软件程序 ……………………………………………………………………27

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